Isn't it all too good to be true?
Metamorphosis
Is it too good to be true? STARC says it's for real
Is that Joe Costello in those red pants? Oasys at DAC
DAC so far
Rock star T-shirt signing
How did Oasys get started?
Ten rules for corporate blog like this one
Harry the ASIC guy says "plausible"
Jay Singh, Plato Networks
Sanjiv Kaul on why he's involved with Oasys
Genomes
Renesas
Aggregation of silicon
Binary Decision Diagrams
Chip Design and the lyrics of the video
The new release
Bryon Moyer comes to visit
Cooley's DAC report is finally out
SCDsource article on Chip Synthesis
Welcome 2010
Gabe Moretti over at EDAcafe
EDA DesignLine
Innovation of the year: go and vote
Mystery fan on ESNUG
Sanjiv's opinion piece over at EEtimes
Gabe Moretti takes another look
Oasys a "must see" at DAC
The Documentation Challenge
Oasys is on Twitter
Sanjiv on "Ode to the Chip Synthesis Hero"
DAC
Gary Smith
Juniper Networks picks Oasys RealTime Designer
Gabe on EDA recommends seeing Oasys
Xilinx licenses Oasys Chip Synthesis technology
DAC in hindsight
Using High Level Synthesis and Chip Synthesis together
Cooley's Deepchip highlights Oasys DAC videos
The Entrepreneurial Engineer
Defining Chip Synthesis
Coolley's DAC report
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Xilinx licenses Oasys Chip Synthesis technology 
Jun 8th, 2010 
Oasys today announced that Xilinx has licensed their Chip Synthesis technology. This follows on the announcement earlier this week with Juniper Networks. Oasys now has one of the companies doing the most leading edge designs on bare silicon, and now the company that creates the substrate for many of the most leading-edge FPGA designs.

It is not entirely clear what Xilinx plans to do with Oasys, and I am not privy to any details. But reading between the lines of the press release, I would guess that Xilinx is going to use RealTime Designer or a derivative of it as part of their flow for their next generation of arrays which will presumably have the capability to handle enormous designs. Presumably this will eventually result in RealTime Designer getting into Xilinx's customers hands, although whether this will be with an Oasys or a Xilinx badge on the hood remains to be seen.

In the short term this announcement is probably most important as a strong validation of the use of RealTime Designer for FPGA based designs.
Posted By paulm at 7:48 pm CDT 
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