Isn't it all too good to be true?
Metamorphosis
Is it too good to be true? STARC says it's for real
Is that Joe Costello in those red pants? Oasys at DAC
DAC so far
Rock star T-shirt signing
How did Oasys get started?
Ten rules for corporate blog like this one
Harry the ASIC guy says "plausible"
Jay Singh, Plato Networks
Sanjiv Kaul on why he's involved with Oasys
Genomes
Renesas
Aggregation of silicon
Binary Decision Diagrams
Chip Design and the lyrics of the video
The new release
Bryon Moyer comes to visit
Cooley's DAC report is finally out
SCDsource article on Chip Synthesis
Welcome 2010
Gabe Moretti over at EDAcafe
EDA DesignLine
Innovation of the year: go and vote
Mystery fan on ESNUG
Sanjiv's opinion piece over at EEtimes
Gabe Moretti takes another look
Oasys a "must see" at DAC
The Documentation Challenge
Oasys is on Twitter
Sanjiv on "Ode to the Chip Synthesis Hero"
DAC
Gary Smith
Juniper Networks picks Oasys RealTime Designer
Gabe on EDA recommends seeing Oasys
Xilinx licenses Oasys Chip Synthesis technology
DAC in hindsight
Using High Level Synthesis and Chip Synthesis together
Cooley's Deepchip highlights Oasys DAC videos
The Entrepreneurial Engineer
Defining Chip Synthesis
Coolley's DAC report
Blog : View
Sanjiv's opinion piece over at EEtimes 
Apr 9th, 2010 
EDAdesignLine has published Sanjiv's opinion piece on whether EDA is innovative enough. While I agree with much of what he says there, I think that the ecosystem by which EDA products are created is largely broken. Time and time again the big companies have proved incapable of developing and bringing to market genuinely innovative products. Instead small startups have done this, and then become part of the mainstream through acquisition. That is not happening much any more since EDA is not a growing attractive market for investment. Not everyone can afford to do what the founders of Oasys did and fund the company with sweat equity.

And although each process node brings new problems and bigger chips, each node also brings fewer chips. Although EDA is "strategic" to semiconductor companies in some sense, that's not how they seem to regard it. It is a cost to be managed in the same was as IT was until the internet came along and suddenly IT was strategic and every company had a CIO. Which semiconductor company has a C-level design methodology officer?

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